• Home

Papers

• Featured Papers
• Dissertations
• 2009
• 2008
• 2007
• 2006
• 2005
• 2004
• 2003
• 2002
• 2001
• 2000
• 1999
• 1998
• 1997
• 1996
• 1995
• 1994
• 1993
• 1992
• 1991
• 1990
• 1989
• 1988
• 1987
• 1986
• 1985
• Key Papers
• Presentations
• Copyright
• Help
•  
•  

Ptolemy Project Papers for 1995

1. Thomas M. Parks, "Bounded Scheduling of Process Networks," Technical Memorandum UCB/ERL-95-105. Ph.D. Thesis, EECS Department, University of California. Berkeley, CA 94720, December 1995.
2. Sundararajan Sriram, "Minimizing Communication and Synchronization Overhead in Multiprocessors for Digital Signal Processing," Tech. Report UCB/ERL 95/90, Ph.D. Thesis, Dept. of EECS, University of California, Berkeley, CA 94720, November 7, 1995.
3. José L. Pino, Shuvra Bhattacharyya and Edward A. Lee, "A Hierarchical Multiprocessor Scheduling System for DSP Applications," Proc. IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, October 29 - November 1, 1995.
4. Thomas M. Parks, José L. Pino, and Edward A. Lee, "A Comparison of Synchronous and Cyclo-Static Dataflow," Proc. IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, October 29 - November 1, 1995.
5. Shuvra Bhattacharyya, Praveen K. Murthy and Edward A. Lee, "Optimal Parenthesization of Lexical Orderings for DSP Block Diagrams," in Proc. IEEE Workshop on VLSI Signal Processing, Osaka, Japan, October 16-18, 1995.
6. Shuvra Bhattacharyya, Sundararajan Sriram and Edward A. Lee, "Resynchronization for Embedded Multiprocessors," ERL Technical Memorandum UCB/ERL M95/70, University of California, Berkeley, CA 94720, September, 1995.
7. Asawaree Kalavade, "System Level Codesign of Mixed Hardware-Software Systems," Tech. Report UCB/ERL 95/88, Ph.D. Thesis, Dept. of EECS, University of California, Berkeley, CA 94720, September, 1995.
8. B. L. Evans, D. R. Firth, K. D. White, and E. A. Lee, "Automatic Generation of Programs That Jointly Optimize Characteristics of Analog Filter Designs," Proc. of European Conference on Circuit Theory and Design, August 27-31, 1995, Istanbul, Turkey, pp. 1047-1050.
9. Shuvra Bhattacharyya, Sundarajan Sriram, and Edward A. Lee, "Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems," Proc. of IEEE Int. Conference on Application Specific Array Processors, July 24-26, 1995.
10. B. L. Evans, S. X. Gu, A. Kalavade, and E. A. Lee, "Symbolic Computation in System Simulation and Design," Invited Paper, Proc. of SPIE Int. Sym. on Advanced Signal Processing Algorithms, Architectures, and Implementations, July 9-16, 1995, San Diego, CA, pp. 396-407.
11. Wan-Teh Chang, Asawaree Kalavade and Edward A. Lee, "Effective Heterogeneous Design and Cosimulation," chapter in Hardware/Software Co-design, G. DeMicheli and M. Sami, eds., NATO ASI Series Vol. 310, Kluwer Academic Publishers,1996. Also presented at NATO Advanced Study Institute Workshop on Hardware/Software Codesign, Lake Como, Italy, June 18 -- 30, 1995.
12. Shuvra Bhattacharyya, Praveen K. Murthy and Edward A. Lee, "Converting Graphical DSP Programs into Memory-Constrained Software Prototypes," Proc. of IEEE Int. Workshop on Rapid Systems Prototyping, Chapel Hill, NC, June 7-9, 1995
13. Asawaree Kalavade and Edward A. Lee, "The Extended Partitioning Problem: Hardware/Software Mapping and Implementation-Bin Selection," Proc. of IEEE Int. Workshop on Rapid Systems Prototyping, Chapel Hill, NC, June 7-9, 1995
14. C. Schwarz, J. Teich, A. Vainshtein, E. Welzl and B. L. Evans, "Minimal Enclosing Parallelogram with Application," ACM Sym. on Computational Geometry, June 5-7, 1995, Vancouver, Canada.
15. Edward A. Lee and Thomas M. Parks, "Dataflow Process Networks," Proceedings of the IEEE, vol. 83, no. 5, pp. 773-801, May, 1995.
16. José L. Pino, Shuvra Bhattacharyya and Edward A. Lee, "Hierarchical Multiprocessor Scheduling Framework for Synchronous Dataflow Graphs," UCB/ERL M95/36, May 30, 1995.
17. R. H. Bamberger, B. L. Evans, E. A. Lee, J. H. McClellan and M. A. Yoder, "Integrating Layout, Analysis, and Simulation Tools in Electronic Courseware for Teaching Signal Processing," Invited Paper, Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, May 8-12, 1995, Detroit, MI, pp. 2873-2876
18. Asawaree Kalavade, Jos&eactue L. Pino and Edward A. Lee, "Managing Complexity in Heterogeneous Specification, Simulation, and Synthesis," Invited Paper, Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, May 8-12, 1995, Detroit, MI, pp. 2833-2836
19. Karim Khiar and Edward A. Lee, "Modeling Radar Systems Using Hierarchical Dataflow," in Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Detroit, MI, May 8-12, 1995, pp. 3259-3262.
20. Thomas M. Parks and Edward A. Lee, "Non Preemptive Real-Time Scheduling of Dataflow Systems," in Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Detroit, MI, May 8-12, 1995, pp. 3235-3238.
21. José L. Pino and Edward A. Lee, "Hierarchical Static Scheduling of Dataflow Graphs onto Multiple Processors," Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Detroit, MI, May 8-12, 1995, pp. 2643-2646.
22. Shuvra Bhattacharyya, Praveen K. Murthy and Edward A. Lee, "Renesting Single Appearance Schedules to Minimize Buffer Memory," UCB/ERL Technical Memorandum UCB/ERL M95/43, Electronics Research Lab., UC Berkeley, CA 94720, April, 1 1995.
23. The Ptolemy Team, "The Ptolemy Kernel-- Supporting Heterogeneous Design," RASSP Digest Newsletter, vol. 2, no. 1, pp. 14-17, 1st Quarter, April, 1995.
24. Praveen K. Murthy and Edward A. Lee, "A Generalization of Multidimensional Synchronous Dataflow to Handle Arbitrary Sampling Lattices," ERL Technical Memorandum UCB/ERL M95/59, Electronics Research Lab, University of California, Berkeley, CA 94720, March 20, 1995. .
25. S. S. Bhattacharyya, J. T. Buck, S. Ha and E. A. Lee, "Generating Compact Code from Dataflow Specifications of Multirate Signal Processing Algorithms," IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 42, no. 3, pp. 138-150, March 1995.
26. J. L. Pino, S. Ha, E. A. Lee and J. T. Buck, "Software Synthesis for DSP Using Ptolemy," Journal on VLSI Signal Processing, vol. 9, no. 1, pp. 7-21, Jan., 1995.
27. Shuvra Bhattacharyya, Praveen K. Murthy and Edward A. Lee, "Two Complementary Heuristics for Translating Graphical DSP Programs into Minimum Memory Software Implementations," Memorandum No. UCB/ERL M95/3, Electronics Research Laboratory, University of California, Berkeley, CA 94720, January 10, 1995.
28. Shuvra Bhattacharyya, Sundararajan Sriram and Edward A. Lee, "Optimizing Synchronization in Multiprocessor Implementations of Iterative Dataflow Programs," ERL Technical Memorandum UCB/ERL M95/2, University of California, Berkeley, CA 94720, January 5, 1995. . Also, to appear in IEEE Tr. on Signal Processing.