A COMPILER SCHEDULING FRAMEWORK FOR MINIMIZING MEMORY REQUIREMENTS OF MULTIRATE DSP SYSTEMS REPRESENTED AS DATAFLOW GRAPHS

by Shuvra S. Bhattacharyya [1], Joseph T. Buck, Soonhoi Ha and Edward A. Lee

Memorandum No. UCB/ERL M93/31
EECS, University of California, Berkeley, CA, USA 94720
April 25th, 1993

[1] This research was supported by DARPA, AT&T Bell Laboratories, Semiconductor Research Corporation, and the Office of Naval Research via the Naval Research Laboratory.

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ABSTRACT

Numerous design environments for signal processing use specification languages with semantics closely related to Synchronous Dataflow (SDF), a restricted form of dataflow that has proven efficient for describing and compiling multirate signal processing algorithms. In SDF, as in other forms of dataflow, a program is specified as a set of computations and a set of data-dependencies between these computations. This allows a compiler freedom to explore different ways to sequence the computations, and to evaluate the associated tradeoffs, such as those involving throughput, code size, and buffering requirements. To guide the scheduling process, compilers may apply some form of "clustering", in which multiple computations are grouped together according to different criteria. In this paper, we develop clustering techniques to synthesize minimum code size implementations of SDF programs, and we extend these to incorporate existing heuristics for minimizing the amount memory required for buffering. We also develop formal techniques to integrate arbitrary clustering strategies Q having arbitrary objectives Q into a minimum code size scheduler.