Performance Analysis of Mixed Asynchronous Synchronous Systems
J. Teich, S. Sriram, L. Thiele and M. Martin
In Proc. 1994 IEEE Workshop on VLSI Signal Processing
![[PDF]](http://ptolemy.eecs.berkeley.edu/image/PDF.gif)
ABSTRACT
The paper is concerned with the timing analysis of a class digital systems we call mixed asynchronous{synchronous systems. In such a system, each computation module is either synchronous (i.e. clocked) or asynchronous (i.e. selftimed). The communication between modules is assumed to be selftimed for all modules. We introduce a graph model called MASS for describing the timing behaviour of such architectures. The graph contains two kinds of nodes, synchronous and asynchronous nodes. The operation model of a MASS is similar to that of a timed marked graph, however, additional schedule constraints are imposed on synchronous nodes: A synchronous node can only record at ticks of its local module clock. We analyze the behaviour of MASS, in particular period, periodicity and maximal throughput rate.
