Generating Efficient Loop Code for Programmable DSPs

H. John Reekie (johnr@eecs.berkeley.edu) and John Potter (johnpot.microsoft.com)

In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing 94 (ICASSP 94), Adelaide, Australia, April 1994, pp II-469 -- II-472.


Abstract

This paper describes our research into compilation techniques for modern, off-the-shelf, floating-point DSP devices. These devices offer a high degree of instruction-level parallelism, which is difficult for compilers to exploit effectively. We capture the dataflow and vector nature of DSP programs at the source level, and then focus on the application of standard and novel compilation techniques to utilise this parallelism, especially in critical inner loops. The compiler uses an abstract DSP machine and target machine descriptions to model the special features of modern DSPs. This approach facilitates the development of target-independent code generation algorithms. We describe in some detail our loop analysis and code generation algorithms.