The Host-Engine Software Architecture for Parallel Digital Signal Processing

H. John Reekie (johnr@eecs.berkeley.edu) and Matthias Meyer

In: Proceedings of PART'94, Workshop on Parallel and Real-time Systems, Melbourne, Australia, July 1994.


Abstract

This paper describes a software architecture for parallel real-time signal processing systems. The architecture consists of two layers: the engine layer, which performs real-time signal processing, and the host layer, responsible for control and configuration operations. Client programs access DSP resources through "objects," which encapsulate physical resources, signal processing algorithms, and support facilities such as scheduling, synchronisation, and inter-processor communications.

The architecture provides a flexible model for construction of real-time parallel DSP systems, and can map onto many different single- and multi-processor configurations. It also provides a basis for hardware-independent access to DSP resources, rapid system construction, re-configurability, and dynamic user control over real-time processing. Two pilot implementations of this architecture are currently under construction.